Integrated circuit packages may be formed as flip chip assemblies. Specifically, a semiconductor die may be bonded face-down (“flipped”) onto an interposer. An example prior art process for forming a flip chip assembly is described with reference to FIGS. 1 and 2.
FIG. 1 shows a semiconductor die 10 in face-down orientation, and shows an interposer 12 beneath the die.
The semiconductor die 10 comprises a base 14 supporting a plurality of bond pad regions 16. The base 14 may comprise a semiconductor material (for instance, monocrystalline silicon) supporting any of numerous integrated circuit components, including, for example, memory components, logic components, sensor components, wiring, etc. The various components are not shown in order to simplify the drawing.
Bond pad regions 16 provide electrical connection from integrated circuit components associated with base 14 to circuitry external of the base. The bond pad regions may comprise, consist essentially of, or consist of aluminum or copper. The bond pad regions are shown to have outer surfaces 17, and electrical interconnect material 18 is shown bonded to such outer surfaces. The electrical interconnect material may comprise, consist essentially of, or consist of gold, and may be balls (as shown) bonded to the bond pad regions, or may be pieces of wire bonded to the bond pad regions.
The bond pad regions 16 may be distributed in numerous orientations across a surface of die 10. For example, the bond pad regions may be so-called inner bond pad regions along a central portion of the die surface, may be so-called outer bond pad regions along non-central portions of the die surface and connected to the inner bond pad regions by redistribution layers, or may be a combination of inner bond pad regions and outer bond pad regions.
Interposer 12 comprises a board 20 and electrical interconnects 22 supported on an upper surface of the board. The interposer also comprises electrical interconnects 24 supported on a lower surface of the board. Various wiring (not shown) may extend through the board to connect various electrical interconnects 22 with various electrical interconnects 24. The electrical interconnects 22 are ultimately bonded to semiconductor die 10 to form an integrated circuit package comprising the die and interposer, and the electrical interconnects 24 are ultimately utilized for electrical connection of the package to other circuitry.
Electrical interconnects 22 may comprise, consist essentially of, or consist of gold. Electrical interconnects 24 may comprise any suitable electrically conductive materials or combinations of materials, and may, for example, comprise materials suitable for bonding to solder.
FIG. 2 shows the interposer 12 bonded to the semiconductor die 10. The bonding may comprise gold-to-gold bonding between gold-containing interconnects 22 and gold-containing interconnects 18. The gold-to-gold bonding is accomplished by pressing interconnects 18 and 22 together while subjecting the interconnects to ultrasonic energy and thermal energy (so-called thermosonic bonding). An underfill 30 is provided in a gap between die 10 and interposer 12. The underfill may comprise a film or paste, and may, for example, comprise non-conductive paste (NCP), anisotropic conductive paste (ACP), anisotropic conductive film (ACF) or organic solderability preservative (OSP).
A problem that can occur is that the bonding between interconnects 18 and 22 may subject bond pad regions 16 to sufficient pressure to cause cracking 32 (only some of which is labeled in FIG. 2) or other defects within the bond pad regions. Another problem that may occur is that the thermosonic energy of the thermosonic bonding may cause cratering or other defects in the bond pad regions. Yet another problem that may occur is that the bonding of interconnects 18 to the bond pad regions 16 to form the semiconductor die construction of FIG. 1 may induce defects within regions 16.
It is desired to develop new methods for assembling integrated circuit packages which avoid some or all of the above-described problems.